IVIonOSX

Development of open source firmware/software for K8056 8-Channel Relay Card produced by Velleman® Inc.

DGC is a tool for the creation of digital netlists. DGC does an optimization and technology mapping for an abstract description of boolean functions and state machines. Output formats are EDIF, XNF and VHDL. Input formats are KISS, PLA and others. See also: http://gitorious.org/dgc-gtk/

Kactus2 is a toolset for IP-XACT based SoC design and provides packaging, integration and configuration of HW and SW components, plus register design and HDL import and generation. The source code is hosted at https://github.com/kactus2/kactus2dev. An example IP library is available at https://github.com/kactus2/ipxactexamplelib Video tutorials are available at https://www.youtube.com/user/Kactus2Tutorial Issue tracker is available at https://github.com/kactus2/kactus2dev/issues For publications, kindly use this reference: http://joss.theoj.org/papers/73e33d6850d24f0d6aad0d5f38937f83 Contributors: Antti Kamppi, Joni-Matti Määttä, Lauri Matilainen, Timo D. Hämäläinen, Mikko Teuho, Juho Järvinen, Esko Pekkarinen, Janne Virtanen Import your existing IPs as IP-XACT componentsCreate new IP-XACT components and generate their HDL module headersReuse IP-XACT files from any standard compatible vendorReuse the IPs in your designs and connect them with wires and busesCreate multilevel hierarchies, where a design has multiple sub-designsConfigure component instances in designs, including the sub-designsUse generator plugins to create HDL with wiring and parameterizationUse memory designer to preview memory maps and address spaces in your hierarchyPackage software to IP-XACT components and map them to hardwareGenerate makefiles that build executables with rules defined in IP-XACT components

Various scripts for several EDA tools such as: RTL Compiler, spyglass, lec, temposync, etc. Scripts are useful in IC design.